__  __    __   __  _____      _            _          _____ _          _ _ 
 |  \/  |   \ \ / / |  __ \    (_)          | |        / ____| |        | | |
 | \  / |_ __\ V /  | |__) | __ ___   ____ _| |_ ___  | (___ | |__   ___| | |
 | |\/| | '__|> <   |  ___/ '__| \ \ / / _` | __/ _ \  \___ \| '_ \ / _ \ | |
 | |  | | |_ / . \  | |   | |  | |\ V / (_| | ||  __/  ____) | | | |  __/ | |
 |_|  |_|_(_)_/ \_\ |_|   |_|  |_| \_/ \__,_|\__\___| |_____/|_| |_|\___V 2.1
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<section id="ohci">
<h1>OHCI<a class="headerlink" href="#ohci" title="Link to this heading">¶</a></h1>
<p>23-Aug-2002</p>
<p>The “ohci-hcd” driver is a USB Host Controller Driver (HCD) that is derived
from the “usb-ohci” driver from the 2.4 kernel series.  The “usb-ohci” code
was written primarily by Roman Weissgaerber &lt;<a class="reference external" href="mailto:weissg&#37;&#52;&#48;vienna&#46;at">weissg<span>&#64;</span>vienna<span>&#46;</span>at</a>&gt; but with
contributions from many others (read its copyright/licencing header).</p>
<p>It supports the “Open Host Controller Interface” (OHCI), which standardizes
hardware register protocols used to talk to USB 1.1 host controllers.  As
compared to the earlier “Universal Host Controller Interface” (UHCI) from
Intel, it pushes more intelligence into the hardware.  USB 1.1 controllers
from vendors other than Intel and VIA generally use OHCI.</p>
<p>Changes since the 2.4 kernel include</p>
<blockquote>
<div><ul class="simple">
<li><p>improved robustness; bugfixes; and less overhead</p></li>
<li><p>supports the updated and simplified usbcore APIs</p></li>
<li><p>interrupt transfers can be larger, and can be queued</p></li>
<li><p>less code, by using the upper level “hcd” framework</p></li>
<li><p>supports some non-PCI implementations of OHCI</p></li>
<li><p>... more</p></li>
</ul>
</div></blockquote>
<p>The “ohci-hcd” driver handles all USB 1.1 transfer types.  Transfers of all
types can be queued.  That was also true in “usb-ohci”, except for interrupt
transfers.  Previously, using periods of one frame would risk data loss due
to overhead in IRQ processing.  When interrupt transfers are queued, those
risks can be minimized by making sure the hardware always has transfers to
work on while the OS is getting around to the relevant IRQ processing.</p>
<ul class="simple">
<li><p>David Brownell
&lt;<a class="reference external" href="mailto:dbrownell&#37;&#52;&#48;users&#46;sourceforge&#46;net">dbrownell<span>&#64;</span>users<span>&#46;</span>sourceforge<span>&#46;</span>net</a>&gt;</p></li>
</ul>
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