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<section id="ad7606-driver">
<h1>AD7606 driver<a class="headerlink" href="#ad7606-driver" title="Link to this heading">¶</a></h1>
<p>ADC driver for Analog Devices Inc. AD7606 and similar devices. The module name
is <code class="docutils literal notranslate"><span class="pre">ad7606</span></code>.</p>
<section id="supported-devices">
<h2>Supported devices<a class="headerlink" href="#supported-devices" title="Link to this heading">¶</a></h2>
<p>The following chips are supported by this driver:</p>
<ul class="simple">
<li><p><a class="reference external" href="https://www.analog.com/en/products/ad7605.html">AD7605</a></p></li>
<li><p><a class="reference external" href="https://www.analog.com/en/products/ad7606.html">AD7606</a></p></li>
<li><p><a class="reference external" href="https://www.analog.com/en/products/ad7606b.html">AD7606B</a></p></li>
<li><p><a class="reference external" href="https://www.analog.com/en/products/ad7616.html">AD7616</a></p></li>
</ul>
</section>
<section id="supported-features">
<h2>Supported features<a class="headerlink" href="#supported-features" title="Link to this heading">¶</a></h2>
<section id="spi-wiring-modes">
<h3>SPI wiring modes<a class="headerlink" href="#spi-wiring-modes" title="Link to this heading">¶</a></h3>
<p>These ADCs can output data on several SDO lines (1/2/4/8). The driver
currently supports only 1 SDO line.</p>
</section>
<section id="spi-offload-wiring">
<h3>SPI offload wiring<a class="headerlink" href="#spi-offload-wiring" title="Link to this heading">¶</a></h3>
<p>When used with a SPI offload, the supported wiring configuration is:</p>
<div class="highlight-none notranslate"><div class="highlight"><pre><span></span>+-------------+ +-------------+
| BUSY |-------->| TRIGGER |
| CS |<--------| CS |
| | | |
| ADC | | SPI |
| | | |
| SDI |<--------| SDO |
| DOUTA |-------->| SDI |
| SCLK |<--------| SCLK |
| | | |
| | +-------------+
| CONVST |<--------| PWM |
+-------------+ +-------------+
</pre></div>
</div>
<p>In this case, the <code class="docutils literal notranslate"><span class="pre">pwms</span></code> property is required.
The <code class="docutils literal notranslate"><span class="pre">#trigger-source-cells</span> <span class="pre">=</span> <span class="pre"><1></span></code> property is also required to connect back
to the SPI offload. The SPI offload will have <code class="docutils literal notranslate"><span class="pre">trigger-sources</span></code> property
with a cell to indicate the busy signal:
<code class="docutils literal notranslate"><span class="pre"><&ad7606</span> <span class="pre">AD4695_TRIGGER_EVENT_BUSY></span></code>.</p>
<div class="admonition seealso">
<p class="admonition-title">See also</p>
<p><a class="reference internal" href="#spi-offload-support">SPI offload support</a></p>
</div>
</section>
<section id="parallel-wiring-mode">
<h3>Parallel wiring mode<a class="headerlink" href="#parallel-wiring-mode" title="Link to this heading">¶</a></h3>
<p>There is also a parallel interface, with 16 lines (that can be reduced to 8 in
byte mode). The parallel interface is selected by declaring the device as
platform in the device tree (with no io-backends node defined, see below).</p>
</section>
<section id="iio-backend-mode">
<h3>IIO-backend mode<a class="headerlink" href="#iio-backend-mode" title="Link to this heading">¶</a></h3>
<p>This mode allows to reach the best sample rates, but it requires an external
hardware (eg HDL or APU) to handle the low level communication.
The backend mode is enabled when through the definition of the “io-backends”
property in the device tree.</p>
<p>The reference configuration for the current implementation of IIO-backend mode
is the HDL reference provided by ADI:
<a class="reference external" href="https://wiki.analog.com/resources/eval/user-guides/ad7606x-fmc/hdl">https://wiki.analog.com/resources/eval/user-guides/ad7606x-fmc/hdl</a></p>
<p>This implementation embeds an IIO-backend compatible IP (adi-axi-adc) and a PWM
connected to the conversion trigger pin.</p>
<div class="highlight-none notranslate"><div class="highlight"><pre><span></span>+---+ +----------------------------
| | +-------+ |AD76xx
| A | controls | | |
| D |-------------->| PWM |-------------->| cnvst
| 7 | | | |
| 6 | +-------+ |
| 0 | controls +-----------+-----------+ |
| 6 |---------->| | |<--| frstdata
| | | Backend | Backend |<--| busy
| D | | Driver | | |
| R | | | |-->| clk
| I | requests |+---------+| DMA | |
| V |----------->| Buffer ||<---- |<=>| DATA
| E | |+---------+| | |
| R | +-----------+-----------+ |
| |-------------------------------------->| reset/configuration gpios
+---+ +-----------------------------
</pre></div>
</div>
</section>
<section id="software-and-hardware-modes">
<h3>Software and hardware modes<a class="headerlink" href="#software-and-hardware-modes" title="Link to this heading">¶</a></h3>
<p>While all the AD7606/AD7616 series parts can be configured using GPIOs, some of
them can be configured using register.</p>
<p>The chips that support software mode have more values available for configuring
the device, as well as more settings, and allow to control the range and
calibration per channel.</p>
<dl class="simple">
<dt>The following settings are available per channel in software mode:</dt><dd><ul class="simple">
<li><p>Scale</p></li>
</ul>
</dd>
</dl>
<p>Also, there is a broader choice of oversampling ratios in software mode.</p>
</section>
<section id="conversion-triggering">
<h3>Conversion triggering<a class="headerlink" href="#conversion-triggering" title="Link to this heading">¶</a></h3>
<p>The conversion can be triggered by two distinct ways:</p>
<blockquote>
<div><ul class="simple">
<li><p>A GPIO is connected to the conversion trigger pin, and this GPIO is controlled
by the driver directly. In this configuration, the driver sets back the
conversion trigger pin to high as soon as it has read all the conversions.</p></li>
<li><p>An external source is connected to the conversion trigger pin. In the
current implementation, it must be a PWM. In this configuration, the driver
does not control directly the conversion trigger pin. Instead, it can
control the PWM’s frequency. This trigger is enabled only for iio-backend.</p></li>
</ul>
</div></blockquote>
</section>
<section id="reference-voltage">
<h3>Reference voltage<a class="headerlink" href="#reference-voltage" title="Link to this heading">¶</a></h3>
<p>2 possible reference voltage sources are supported:</p>
<blockquote>
<div><ul class="simple">
<li><p>Internal reference (2.5V)</p></li>
<li><p>External reference (2.5V)</p></li>
</ul>
</div></blockquote>
<p>The source is determined by the device tree. If <code class="docutils literal notranslate"><span class="pre">refin-supply</span></code> is present,
then the external reference is used, otherwise the internal reference is used.</p>
</section>
<section id="oversampling">
<h3>Oversampling<a class="headerlink" href="#oversampling" title="Link to this heading">¶</a></h3>
<p>This family supports oversampling to improve SNR.
In software mode, the following ratios are available:
1 (oversampling disabled)/2/4/8/16/32/64/128/256.</p>
</section>
<section id="unimplemented-features">
<h3>Unimplemented features<a class="headerlink" href="#unimplemented-features" title="Link to this heading">¶</a></h3>
<ul class="simple">
<li><p>2/4/8 SDO lines</p></li>
<li><p>CRC indication</p></li>
<li><p>Calibration</p></li>
</ul>
</section>
</section>
<section id="spi-offload-support">
<h2>SPI offload support<a class="headerlink" href="#spi-offload-support" title="Link to this heading">¶</a></h2>
<p>To be able to achieve the maximum sample rate, the driver can be used with the
<a class="reference external" href="https://analogdevicesinc.github.io/hdl/library/spi_engine/index.html">AXI SPI Engine</a> to provide SPI offload support.</p>
<p>When SPI offload is being used, some attributes will be different.</p>
<ul class="simple">
<li><p><code class="docutils literal notranslate"><span class="pre">trigger</span></code> directory is removed.</p></li>
<li><p><code class="docutils literal notranslate"><span class="pre">sampling_frequency</span></code> attribute is added for setting the sample rate.</p></li>
<li><p><code class="docutils literal notranslate"><span class="pre">timestamp</span></code> channel is removed.</p></li>
<li><p>Buffer data format may be different compared to when offload is not used,
e.g. the <code class="docutils literal notranslate"><span class="pre">in_voltage0_type</span></code> attribute.</p></li>
</ul>
</section>
<section id="device-buffers">
<h2>Device buffers<a class="headerlink" href="#device-buffers" title="Link to this heading">¶</a></h2>
<section id="iio-triggered-buffer">
<h3>IIO triggered buffer<a class="headerlink" href="#iio-triggered-buffer" title="Link to this heading">¶</a></h3>
<p>This driver supports IIO triggered buffers, with a “built in” trigger, i.e the
trigger is allocated and linked by the driver, and a new conversion is triggered
as soon as the samples are transferred, and a timestamp channel is added to make
up for the potential jitter induced by the delays in the interrupt handling.</p>
</section>
<section id="iio-backend-buffer">
<h3>IIO backend buffer<a class="headerlink" href="#iio-backend-buffer" title="Link to this heading">¶</a></h3>
<p>When IIO backend is used, the trigger is not needed, and the sample rate is
considered as stable. There is no timestamp channel. The communication is
delegated to an external logic, called a backend, and the backend’s driver
handles the buffer. When this mode is enabled, the driver cannot control the
conversion pin, because the busy pin is bound to the backend.</p>
</section>
</section>
</section>
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