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<section id="kernel-driver-max31827">
<h1>Kernel driver max31827<a class="headerlink" href="#kernel-driver-max31827" title="Link to this heading">¶</a></h1>
<p>Supported chips:</p>
<blockquote>
<div><ul>
<li><p>Maxim MAX31827</p>
<p>Prefix: ‘max31827’</p>
<p>Addresses scanned: I2C 0x40 - 0x5f</p>
<p>Datasheet: Publicly available at the Analog Devices website</p>
</li>
<li><p>Maxim MAX31828</p>
<p>Prefix: ‘max31828’</p>
<p>Addresses scanned: I2C 0x40 - 0x5f</p>
<p>Datasheet: Publicly available at the Analog Devices website</p>
</li>
<li><p>Maxim MAX31829</p>
<p>Prefix: ‘max31829’</p>
<p>Addresses scanned: I2C 0x40 - 0x5f</p>
<p>Datasheet: Publicly available at the Analog Devices website</p>
</li>
</ul>
</div></blockquote>
<dl class="simple">
<dt>Authors:</dt><dd><ul class="simple">
<li><p>Daniel Matyas &lt;<a class="reference external" href="mailto:daniel&#46;matyas&#37;&#52;&#48;analog&#46;com">daniel<span>&#46;</span>matyas<span>&#64;</span>analog<span>&#46;</span>com</a>&gt;</p></li>
</ul>
</dd>
</dl>
<section id="description">
<h2>Description<a class="headerlink" href="#description" title="Link to this heading">¶</a></h2>
<p>The chips supported by this driver are quite similar. The only difference
between them is found in the default power-on behaviour of the chips. While the
MAX31827’s fault queue is set to 1, the other two chip’s fault queue is set to
4. Besides this, the MAX31829’s alarm active state is high, while the other two
chip’s alarms are active on low. It is important to note that the chips can be
configured to operate in the same manner with 1 write operation to the
configuration register. From here on, we will refer to all these chips as
MAX31827.</p>
<p>MAX31827 implements a temperature sensor with a 6 WLP packaging scheme. This
sensor measures the temperature of the chip itself.</p>
<p>MAX31827 has low and over temperature alarms with an effective value and a
hysteresis value: -40 and -30 degrees for under temperature alarm and +100 and
+90 degrees for over temperature alarm.</p>
<p>The alarm can be configured in comparator and interrupt mode from the
devicetree. In Comparator mode, the OT/UT status bits have a value of 1 when the
temperature rises above the TH value or falls below TL, which is also subject to
the Fault Queue selection. OT status returns to 0 when the temperature drops
below the TH_HYST value or when shutdown mode is entered. Similarly, UT status
returns to 0 when the temperature rises above TL_HYST value or when shutdown
mode is entered.</p>
<p>In interrupt mode exceeding TH also sets OT status to 1, which remains set until
a read operation is performed on the configuration/status register (max or min
attribute); at this point, it returns to 0. Once OT status is set to 1 from
exceeding TH and reset, it is set to 1 again only when the temperature drops
below TH_HYST. The output remains asserted until it is reset by a read. It is
set again if the temperature rises above TH, and so on. The same logic applies
to the operation of the UT status bit.</p>
<p>Putting the MAX31827 into shutdown mode also resets the OT/UT status bits. Note
that if the mode is changed while OT/UT status bits are set, an OT/UT status
reset may be required before it begins to behave normally. To prevent this,
it is recommended to perform a read of the configuration/status register to
clear the status bits before changing the operating mode.</p>
<p>The conversions can be manual with the one-shot functionality and automatic with
a set frequency. When powered on, the chip measures temperatures with 1 conv/s.
The conversion rate can be modified with update_interval attribute of the chip.
Conversion/second = 1/update_interval. Thus, the available options according to
the data sheet are:</p>
<ul class="simple">
<li><p>64000 (ms) = 1 conv/64 sec</p></li>
<li><p>32000 (ms) = 1 conv/32 sec</p></li>
<li><p>16000 (ms) = 1 conv/16 sec</p></li>
<li><p>4000 (ms) = 1 conv/4 sec</p></li>
<li><p>1000 (ms) = 1 conv/sec (default)</p></li>
<li><p>250 (ms) = 4 conv/sec</p></li>
<li><p>125 (ms) = 8 conv/sec</p></li>
</ul>
<p>Enabling the device when it is already enabled has the side effect of setting
the conversion frequency to 1 conv/s. The conversion time varies depending on
the resolution.</p>
<p>The conversion time doubles with every bit of increased resolution. The
available resolutions are:</p>
<ul class="simple">
<li><p>8 bit -&gt; 8.75 ms conversion time</p></li>
<li><p>9 bit -&gt; 17.5 ms conversion time</p></li>
<li><p>10 bit -&gt; 35 ms conversion time</p></li>
<li><p>12 bit (default) -&gt; 140 ms conversion time</p></li>
</ul>
<p>There is a temp1_resolution attribute which indicates the unit change in the
input temperature in milli-degrees C.</p>
<ul class="simple">
<li><p>1000 mC -&gt; 8 bit</p></li>
<li><p>500 mC -&gt; 9 bit</p></li>
<li><p>250 mC -&gt; 10 bit</p></li>
<li><p>62 mC -&gt; 12 bit (default) - actually this is 62.5, but the fil returns 62</p></li>
</ul>
<p>When chip is in shutdown mode and a read operation is requested, one-shot is
triggered, the device waits for &lt;conversion time&gt; ms, and only after that is
the temperature value register read. Note that the conversion times are rounded
up to the nearest possible integer.</p>
<p>The LSB of the temperature values is 0.0625 degrees Celsius, but the values of
the temperatures are displayed in milli-degrees. This means, that some data is
lost. The step between 2 consecutive values is 62 or 63. This effect can be seen
in the writing of alarm values too. For positive numbers the user-input value
will always be rounded down to the nearest possible value, for negative numbers
the user-input will always be rounded up to the nearest possible value.</p>
<p>Bus timeout resets the I2C-compatible interface when SCL is low for more than
30ms (nominal).</p>
<p>Alarm polarity determines if the active state of the alarm is low or high. The
behavior for both settings is dependent on the Fault Queue setting. The ALARM
pin is an open-drain output and requires a pullup resistor to operate.</p>
<p>The Fault Queue bits select how many consecutive temperature faults must occur
before overtemperature or undertemperature faults are indicated in the
corresponding status bits.</p>
</section>
<section id="pec-support">
<h2>PEC Support<a class="headerlink" href="#pec-support" title="Link to this heading">¶</a></h2>
<p>When reading a register value, the PEC byte is computed and sent by the chip.</p>
<p>PEC on word data transaction represents a significant increase in bandwidth
usage (+33% for both write and reads) in normal conditions.</p>
<p>Since this operation implies there will be an extra delay to each
transaction, PEC can be disabled or enabled through sysfs.
Just write 1  to the “pec” file for enabling PEC and 0 for disabling it.</p>
</section>
</section>


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