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<section id="kernel-memory-layout-on-arm-linux">
<h1>Kernel Memory Layout on ARM Linux<a class="headerlink" href="#kernel-memory-layout-on-arm-linux" title="Link to this heading">ΒΆ</a></h1>
<blockquote>
<div><p>Russell King <<a class="reference external" href="mailto:rmk%40arm.linux.org.uk">rmk<span>@</span>arm<span>.</span>linux<span>.</span>org<span>.</span>uk</a>></p>
<blockquote>
<div><p>November 17, 2005 (2.6.15)</p>
</div></blockquote>
</div></blockquote>
<p>This document describes the virtual memory layout which the Linux
kernel uses for ARM processors. It indicates which regions are
free for platforms to use, and which are used by generic code.</p>
<p>The ARM CPU is capable of addressing a maximum of 4GB virtual memory
space, and this must be shared between user space processes, the
kernel, and hardware devices.</p>
<p>As the ARM architecture matures, it becomes necessary to reserve
certain regions of VM space for use for new facilities; therefore
this document may reserve more VM space over time.</p>
<table class="docutils align-default">
<thead>
<tr class="row-odd"><th class="head"><p>Start</p></th>
<th class="head"><p>End</p></th>
<th class="head"><p>Use</p></th>
</tr>
</thead>
<tbody>
<tr class="row-even"><td><p>ffff8000</p></td>
<td><p>ffffffff</p></td>
<td><p>copy_user_page / clear_user_page use.
For SA11xx and Xscale, this is used to
setup a minicache mapping.</p></td>
</tr>
<tr class="row-odd"><td><p>ffff4000</p></td>
<td><p>ffffffff</p></td>
<td><p>cache aliasing on ARMv6 and later CPUs.</p></td>
</tr>
<tr class="row-even"><td><p>ffff1000</p></td>
<td><p>ffff7fff</p></td>
<td><p>Reserved.
Platforms must not use this address range.</p></td>
</tr>
<tr class="row-odd"><td><p>ffff0000</p></td>
<td><p>ffff0fff</p></td>
<td><p>CPU vector page.
The CPU vectors are mapped here if the
CPU supports vector relocation (control
register V bit.)</p></td>
</tr>
<tr class="row-even"><td><p>fffe0000</p></td>
<td><p>fffeffff</p></td>
<td><p>XScale cache flush area. This is used
in proc-xscale.S to flush the whole data
cache. (XScale does not have TCM.)</p></td>
</tr>
<tr class="row-odd"><td><p>fffe8000</p></td>
<td><p>fffeffff</p></td>
<td><p>DTCM mapping area for platforms with
DTCM mounted inside the CPU.</p></td>
</tr>
<tr class="row-even"><td><p>fffe0000</p></td>
<td><p>fffe7fff</p></td>
<td><p>ITCM mapping area for platforms with
ITCM mounted inside the CPU.</p></td>
</tr>
<tr class="row-odd"><td><p>ffc80000</p></td>
<td><p>ffefffff</p></td>
<td><p>Fixmap mapping region. Addresses provided
by <code class="xref c c-func broken_xref docutils literal notranslate"><span class="pre">fix_to_virt()</span></code> will be located here.</p></td>
</tr>
<tr class="row-even"><td><p>ffc00000</p></td>
<td><p>ffc7ffff</p></td>
<td><p>Guard region</p></td>
</tr>
<tr class="row-odd"><td><p>ff800000</p></td>
<td><p>ffbfffff</p></td>
<td><p>Permanent, fixed read-only mapping of the
firmware provided DT blob</p></td>
</tr>
<tr class="row-even"><td><p>fee00000</p></td>
<td><p>feffffff</p></td>
<td><p>Mapping of PCI I/O space. This is a static
mapping within the vmalloc space.</p></td>
</tr>
<tr class="row-odd"><td><p>VMALLOC_START</p></td>
<td><p>VMALLOC_END-1</p></td>
<td><p><a class="reference internal" href="../../core-api/mm-api.html#c.vmalloc" title="vmalloc"><code class="xref c c-func docutils literal notranslate"><span class="pre">vmalloc()</span></code></a> / <a class="reference internal" href="../../driver-api/device-io.html#c.ioremap" title="ioremap"><code class="xref c c-func docutils literal notranslate"><span class="pre">ioremap()</span></code></a> space.
Memory returned by vmalloc/ioremap will
be dynamically placed in this region.
Machine specific static mappings are also
located here through <code class="xref c c-func broken_xref docutils literal notranslate"><span class="pre">iotable_init()</span></code>.
VMALLOC_START is based upon the value
of the high_memory variable, and VMALLOC_END
is equal to 0xff800000.</p></td>
</tr>
<tr class="row-even"><td><p>PAGE_OFFSET</p></td>
<td><p>high_memory-1</p></td>
<td><p>Kernel direct-mapped RAM region.
This maps the platforms RAM, and typically
maps all platform RAM in a 1:1 relationship.</p></td>
</tr>
<tr class="row-odd"><td><p>PKMAP_BASE</p></td>
<td><p>PAGE_OFFSET-1</p></td>
<td><p>Permanent kernel mappings
One way of mapping HIGHMEM pages into kernel
space.</p></td>
</tr>
<tr class="row-even"><td><p>MODULES_VADDR</p></td>
<td><p>MODULES_END-1</p></td>
<td><p>Kernel module space
Kernel modules inserted via insmod are
placed here using dynamic mappings.</p></td>
</tr>
<tr class="row-odd"><td><p>TASK_SIZE</p></td>
<td><p>MODULES_VADDR-1</p></td>
<td><p>KASAn shadow memory when KASan is in use.
The range from MODULES_VADDR to the top
of the memory is shadowed here with 1 bit
per byte of memory.</p></td>
</tr>
<tr class="row-even"><td><p>00001000</p></td>
<td><p>TASK_SIZE-1</p></td>
<td><p>User space mappings
Per-thread mappings are placed here via
the mmap() system call.</p></td>
</tr>
<tr class="row-odd"><td><p>00000000</p></td>
<td><p>00000fff</p></td>
<td><p>CPU vector page / null pointer trap
CPUs which do not support vector remapping
place their vector page here. NULL pointer
dereferences by both the kernel and user
space are also caught via this mapping.</p></td>
</tr>
</tbody>
</table>
<p>Please note that mappings which collide with the above areas may result
in a non-bootable kernel, or may cause the kernel to (eventually) panic
at run time.</p>
<p>Since future CPUs may impact the kernel mapping layout, user programs
must not access any memory which is not mapped inside their 0x0001000
to TASK_SIZE address range. If they wish to access these areas, they
must set up their own mappings using open() and mmap().</p>
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