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<section id="release-notes-for-linux-on-intel-s-ixp4xx-network-processor">
<h1>Release Notes for Linux on Intel’s IXP4xx Network Processor<a class="headerlink" href="#release-notes-for-linux-on-intel-s-ixp4xx-network-processor" title="Link to this heading">¶</a></h1>
<section id="maintained-by-deepak-saxena-dsaxena-plexity-net">
<h2>Maintained by Deepak Saxena <<a class="reference external" href="mailto:dsaxena%40plexity.net">dsaxena<span>@</span>plexity<span>.</span>net</a>><a class="headerlink" href="#maintained-by-deepak-saxena-dsaxena-plexity-net" title="Link to this heading">¶</a></h2>
<ol class="arabic simple">
<li><p>Overview</p></li>
</ol>
<p>Intel’s IXP4xx network processor is a highly integrated SOC that
is targeted for network applications, though it has become popular
in industrial control and other areas due to low cost and power
consumption. The IXP4xx family currently consists of several processors
that support different network offload functions such as encryption,
routing, firewalling, etc. The IXP46x family is an updated version which
supports faster speeds, new memory and flash configurations, and more
integration such as an on-chip I2C controller.</p>
<p>For more information on the various versions of the CPU, see:</p>
<blockquote>
<div><p><a class="reference external" href="http://developer.intel.com/design/network/products/npfamily/ixp4xx.htm">http://developer.intel.com/design/network/products/npfamily/ixp4xx.htm</a></p>
</div></blockquote>
<p>Intel also made the IXCP1100 CPU for sometime which is an IXP4xx
stripped of much of the network intelligence.</p>
<ol class="arabic simple" start="2">
<li><p>Linux Support</p></li>
</ol>
<p>Linux currently supports the following features on the IXP4xx chips:</p>
<ul class="simple">
<li><p>Dual serial ports</p></li>
<li><p>PCI interface</p></li>
<li><p>Flash access (MTD/JFFS)</p></li>
<li><p>I2C through GPIO on IXP42x</p></li>
<li><p>GPIO for input/output/interrupts
See arch/arm/mach-ixp4xx/include/mach/platform.h for access functions.</p></li>
<li><p>Timers (watchdog, OS)</p></li>
</ul>
<p>The following components of the chips are not supported by Linux and
require the use of Intel’s proprietary CSR software:</p>
<ul class="simple">
<li><p>USB device interface</p></li>
<li><p>Network interfaces (HSS, Utopia, NPEs, etc)</p></li>
<li><p>Network offload functionality</p></li>
</ul>
<p>If you need to use any of the above, you need to download Intel’s
software from:</p>
<blockquote>
<div><p><a class="reference external" href="http://developer.intel.com/design/network/products/npfamily/ixp425.htm">http://developer.intel.com/design/network/products/npfamily/ixp425.htm</a></p>
</div></blockquote>
<p>DO NOT POST QUESTIONS TO THE LINUX MAILING LISTS REGARDING THE PROPRIETARY
SOFTWARE.</p>
<p>There are several websites that provide directions/pointers on using
Intel’s software:</p>
<blockquote>
<div><ul class="simple">
<li><p><a class="reference external" href="http://sourceforge.net/projects/ixp4xx-osdg/">http://sourceforge.net/projects/ixp4xx-osdg/</a>
Open Source Developer’s Guide for using uClinux and the Intel libraries</p></li>
<li><p><a class="reference external" href="http://gatewaymaker.sourceforge.net/">http://gatewaymaker.sourceforge.net/</a>
Simple one page summary of building a gateway using an IXP425 and Linux</p></li>
<li><p><a class="reference external" href="http://ixp425.sourceforge.net/">http://ixp425.sourceforge.net/</a>
ATM device driver for IXP425 that relies on Intel’s libraries</p></li>
</ul>
</div></blockquote>
<ol class="arabic simple" start="3">
<li><p>Known Issues/Limitations</p></li>
</ol>
<p>3a. Limited inbound PCI window</p>
<p>The IXP4xx family allows for up to 256MB of memory but the PCI interface
can only expose 64MB of that memory to the PCI bus. This means that if
you are running with > 64MB, all PCI buffers outside of the accessible
range will be bounced using the routines in arch/arm/common/dmabounce.c.</p>
<p>3b. Limited outbound PCI window</p>
<p>IXP4xx provides two methods of accessing PCI memory space:</p>
<ol class="arabic simple">
<li><p>A direct mapped window from 0x48000000 to 0x4bffffff (64MB).
To access PCI via this space, we simply <a class="reference internal" href="../../driver-api/device-io.html#c.ioremap" title="ioremap"><code class="xref c c-func docutils literal notranslate"><span class="pre">ioremap()</span></code></a> the BAR
into the kernel and we can use the standard read[bwl]/write[bwl]
macros. This is the preferred method due to speed but it
limits the system to just 64MB of PCI memory. This can be
problematic if using video cards and other memory-heavy devices.</p></li>
<li><p>If > 64MB of memory space is required, the IXP4xx can be
configured to use indirect registers to access PCI This allows
for up to 128MB (0x48000000 to 0x4fffffff) of memory on the bus.
The disadvantage of this is that every PCI access requires
three local register accesses plus a spinlock, but in some
cases the performance hit is acceptable. In addition, you cannot
mmap() PCI devices in this case due to the indirect nature
of the PCI window.</p></li>
</ol>
<p>By default, the direct method is used for performance reasons. If
you need more PCI memory, enable the IXP4XX_INDIRECT_PCI config option.</p>
<p>3c. GPIO as Interrupts</p>
<p>Currently the code only handles level-sensitive GPIO interrupts</p>
<ol class="arabic simple" start="4">
<li><p>Supported platforms</p></li>
</ol>
<p>ADI Engineering Coyote Gateway Reference Platform
<a class="reference external" href="http://www.adiengineering.com/productsCoyote.html">http://www.adiengineering.com/productsCoyote.html</a></p>
<blockquote>
<div><p>The ADI Coyote platform is reference design for those building
small residential/office gateways. One NPE is connected to a 10/100
interface, one to 4-port 10/100 switch, and the third to and ADSL
interface. In addition, it also supports to POTs interfaces connected
via SLICs. Note that those are not supported by Linux ATM. Finally,
the platform has two mini-PCI slots used for 802.11[bga] cards.
Finally, there is an IDE port hanging off the expansion bus.</p>
</div></blockquote>
<p>Gateworks Avila Network Platform
<a class="reference external" href="http://www.gateworks.com/support/overview.php">http://www.gateworks.com/support/overview.php</a></p>
<blockquote>
<div><p>The Avila platform is basically and IXDP425 with the 4 PCI slots
replaced with mini-PCI slots and a CF IDE interface hanging off
the expansion bus.</p>
</div></blockquote>
<p>Intel IXDP425 Development Platform
<a class="reference external" href="http://www.intel.com/design/network/products/npfamily/ixdpg425.htm">http://www.intel.com/design/network/products/npfamily/ixdpg425.htm</a></p>
<blockquote>
<div><p>This is Intel’s standard reference platform for the IXDP425 and is
also known as the Richfield board. It contains 4 PCI slots, 16MB
of flash, two 10/100 ports and one ADSL port.</p>
</div></blockquote>
<p>Intel IXDP465 Development Platform
<a class="reference external" href="http://www.intel.com/design/network/products/npfamily/ixdp465.htm">http://www.intel.com/design/network/products/npfamily/ixdp465.htm</a></p>
<blockquote>
<div><p>This is basically an IXDP425 with an IXP465 and 32M of flash instead
of just 16.</p>
</div></blockquote>
<p>Intel IXDPG425 Development Platform</p>
<blockquote>
<div><p>This is basically and ADI Coyote board with a NEC EHCI controller
added. One issue with this board is that the mini-PCI slots only
have the 3.3v line connected, so you can’t use a PCI to mini-PCI
adapter with an E100 card. So to NFS root you need to use either
the CSR or a WiFi card and a ramdisk that BOOTPs and then does
a pivot_root to NFS.</p>
</div></blockquote>
<p>Motorola PrPMC1100 Processor Mezanine Card
<a class="reference external" href="http://www.fountainsys.com">http://www.fountainsys.com</a></p>
<blockquote>
<div><p>The PrPMC1100 is based on the IXCP1100 and is meant to plug into
and IXP2400/2800 system to act as the system controller. It simply
contains a CPU and 16MB of flash on the board and needs to be
plugged into a carrier board to function. Currently Linux only
supports the Motorola PrPMC carrier board for this platform.</p>
</div></blockquote>
<ol class="arabic simple" start="5">
<li><p>TODO LIST</p></li>
</ol>
<ul class="simple">
<li><p>Add support for Coyote IDE</p></li>
<li><p>Add support for edge-based GPIO interrupts</p></li>
<li><p>Add support for CF IDE on expansion bus</p></li>
</ul>
<ol class="arabic simple" start="6">
<li><p>Thanks</p></li>
</ol>
<p>The IXP4xx work has been funded by Intel Corp. and MontaVista Software, Inc.</p>
<p>The following people have contributed patches/comments/etc:</p>
<ul class="simple">
<li><p>Lennerty Buytenhek</p></li>
<li><p>Lutz Jaenicke</p></li>
<li><p>Justin Mayfield</p></li>
<li><p>Robert E. Ranslam</p></li>
</ul>
<p>[I know I’ve forgotten others, please email me to be added]</p>
<hr class="docutils" />
<p>Last Update: 01/04/2005</p>
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